Analyzing and Predicting Processor Vulnerability to Soft Errors Using Statistical Techniques

The shrinking processor feature size, lower threshold voltage and increasing on-chip transistor density make current processors highly vulnerable to soft errors. Architectural Vulnerability Factor (AVF) reflects the probability that a raw soft error eventually causes a visible error in the program output, indicating the processor’s susceptibility to soft errors at architectural level. The awareness of the AVF, both at the early design stage and during program runtime, is greatly useful for designing reliable processors. However, measuring the AVF is extremely costly, resulting in large overheads in hardware, computation, and power. The situation is further exacerbated in a multi-threaded processor environment where resource contention and data sharing exist among different threads. Consequently, predicting the AVF from other easily-measured metrics becomes extraordinarily attractive to computer designers. We propose a series of AVF modeling and prediction works via using advanced statistical techniques. First, we utilize the Boosted Regression Trees (BRT) scheme to dynamically predict the AVF during program execution from a variety of performance metrics. This correlation is generalized to be across different workloads, program phases, and processor configurations on a single-threaded superscalar processor. Second, the AVF prediction is extended to multi-threaded processors where the inter-thread resource contention shows significant and non-uniform impacts on different programs; we propose a two-level predictive mechanism using BRT as building blocks to characterize the contention behavior. Finally, we employ a rule search strategy named Patient Rule Induction Method (PRIM) to explore a large processor design space at the early design stage. We are capable of generating selective rules on important configuration parameters. These rules quantify the design space subregion yielding lowest values of the response, thereby providing useful guidelines for designing reliable processors while achieving high performance

Power Efficient IP Lookup with Supernode Caching

Abstract-In this paper, we propose a novel supernode caching scheme to reduce IP lookup latencies and energy consumption in network processors. In stead of using an expensive TCAM based scheme, we implement a set associative SRAM based cache. We organize the IP routing table as a supernode tree (a tree bitmap structure

Organic photovoltaic devices with enhanced efficiency processed from non-halogenated binary solvent blends

The development of processing routes to fabricate organic photovoltaic devices (OPVs) using non-halogenated solvents is a necessary step towards their eventual commercialisation. To address this issue, we have used Hansen solubility parameter analysis to identify a non-halogenated solvent blend based on a mixture of carbon disulphide and acetone. This solvent blend was then used to deposit a donor–acceptor polymer–fullerene thin-film that was then used as the active layer of bulk-heterojunction OPV. For the benchmark polymer:fullerene system PCDTBT:PC70BM, a power conversion efficiency of 6.75% was achieved; a 20% relative improvement over reference cells processed using the chlorinated-solvent chlorobenzene. Improvements in device efficiency are attributed to an increase in electron and hole conductivity resulting from enhanced fullerene crystallisation; a property that leads to enhanced device efficiency through improved charge extraction

Design configuration selection for hard-error reliable processors via statistical rules

a b s t r a c t Lifetime reliability is becoming a first-order concern in processor manufacturing in addition to conventional design goals including performance, power consumption and thermal features since semiconductor technology enters the deep submicron era. This requires computer architects to carefully examine each design option and evaluate its reliability, in order to prolong the lifetime of the target processor. However, the complex wear-out mechanisms which cause processor failure and their interactions with varying microarchitectural configurations are still far from well understood, making the early optimization for chip reliability a challenging problem. To address this issue, we investigate the relationship between processor reliability and the design configuration by exploring a large processor design space in this paper. We employ a rule search strategy to generate a set of rules to identify the optimal configurations for reliability and its tradeoff with other design goals. In addition to the wear-out effects, the ever-shrinking feature size of modern transistors makes process variation a significant issue in the chip fabrication. Process variation results in unexpected distributions of key design parameters, thus remarkably impacting important features of the target processor. Therefore, we also extend our investigation to identify the optimal configurations in the presence of process variation

Efficient Adsorption of Tebuconazole in Aqueous Solution by Calcium Modified Water Hyacinth-Based Biochar: Adsorption Kinetics, Mechanism, and Feasibility

The application of fungicides (such as tebuconazole) can impose harmful impacts on the ecosystem and humans. In this study, a new calcium modified water hyacinth-based biochar (WHCBC) was prepared and its effectiveness for removing tebuconazole (TE) via adsorption from water was tested. The results showed that Ca was loaded chemically (CaC2O4) onto the surface of WHCBC. The adsorption capacity of the modified biochar increased by 2.5 times in comparison to that of the unmodified water hyacinth biochar. The enhanced adsorption was attributed to the improved chemical adsorption capacity of the biochar through calcium modification. The adsorption data were better fitted to the pseudo-second-order kinetics and the Langmuir isotherm model, indicating that the adsorption process was dominated by monolayer adsorption. It was found that liquid film diffusion was the main rate-limiting step in the adsorption process. The maximum adsorption capacity of WHCBC was 40.5 mg/g for TE. The results indicate that the absorption mechanisms involved surface complexation, hydrogen bonding, and π–π interactions. The inhibitory rate of Cu2+ and Ca2+ on the adsorption of TE by WHCBC were at 4.05–22.8%. In contrast, the presence of other coexisting cations (Cr6+, K+, Mg2+, Pb2+), as well as natural organic matter (humic acid), could promote the adsorption of TE by 4.45–20.9%. In addition, the regeneration rate of WHCBC was able to reach up to 83.3% after five regeneration cycles by desorption stirring with 0.2 mol/L HCl (t = 360 min). The results suggest that WHCBC has a potential in application for removing TE from water